2008 ISSCC Call for Papers
The 2008 IEEE International Solid-State Circuits Conference (ISSCC) is being held in San Francisco, California, USA, on 3-7 February 2008. A call for papers has been announced for the conference, with the theme being “System Integration for Life and Style”. Contributions are sought from authors who demonstrate ways in which the integration of novel circuit and systems can deliver functions that enrich the lives of users. Online submissions of papers will be accepted starting 1 July 2007; final submission deadline is 17 September 2007. For more information about the conference and detailed paper submission instructions, please visit

New Lattice FPGAs Raise Industry Standards
Lattice Semiconductor is driving industry changes in the manufacture of field-programmable gate arrays with the release of its third generation of nonvolatile FPGAs, produced in a 90-nanometer process, according to industry experts, who say previous innovations by Lattice have been followed by other firms. The latest product, the LatticeXP2 family, co-developed with Fujitsu, doubles maximum logic capacity to 40 kilobyte lookup tables, adds dedicated digital signal processing blocks, and improves performance 25 percent, while reducing the price per function by up to 50 percent. The devices also include enhanced design security, RAM backup, and live-update capabilities. Read more
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Mitsubishi Electric Debuts New Chip for “White Goods”
A new single-chip inverter for 90-watt drives developed for the needs of washing machine, dishwasher, stove, and refrigerator manufacturers protects against undervoltage, short circuits, and over-temperature, according to its developer, Mitsubishi Electric Europe. The new single-chip device, M81500FP, is rated for 500 volts at 1 ampere, integrates control, drive and protection functions, IGBTs, freewheeling diodes, and bootstrap diodes. According to Mitsubishi, manufacturers of so-called “white goods” can use electronic motor control for the first time while reducing power consumption. The company says its chip is the world's smallest intelligent power module in the 90-watt range, manufactured in silicon on insulator technology. Read more
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2007 IEEE International Workshop on Safety, Security, and Rescue Robotics
This year, the IEEE International Workshop on Safety, Security, and Rescue Robotics, which is dedicated to identifying and solving the key issues necessary to field capable robots across a variety of challenging applications, is being hosted at the Istituto Superiore Antincendi in Rome, Italy from 27 to 29 September 2007. The fifth annual conference will address both the research challenges posed by search and rescue scenarios and the design of deployable robotic systems that satisfy user-defined requirements. For more information about the conference, visit
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Firm Debuts 300-Watt Transistor for Broadcast
A power transistor capable of delivering 300 watts over the full UHF band for the TV transmitter/broadcast market is being debuted by the Netherlands firm NXP. The device is capable of maximizing power output from available input and increasing efficiency to 55 percent Constant Wave and 32 percent for digital broadcasting. The device is very efficient, according to NXP, allowing broadcasters to increase output power and provide richer content at a lower cost. Read more
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Spintronic Computing Possible with New Design
A semiconductor-based device that uses the charge and quantum spin of electrons, and performs the same logical operations as the transistors in a normal silicon chip, has been designed by researchers at the University of California, San Diego, who say its spintronic logic gates could be integrated into large-scale integrated circuits. If workable, the design would be the first to harness the potential of spintronics for use in conventional semiconductor materials, creating faster and more flexible computers that transcend the physical limits of conventional microprocessors. The device is based on five microscopic bar-shaped magnetic contacts – two outer pairs flanking a single central one – along a strip of semiconducting material. The magnetization of the pair of bars at each end of the strip controls how many electrons with spin oriented in a particular direction can accumulate in the underlying semiconductor; this “spin accumulation” controls the output signal. Read more
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Bubbles May Untangle Nanotube Manufacturing
Nitrogen bubbles may be the key to separating and aligning tangled nanowires and nanotubes for use in manufacturing, according to researchers at Harvard University and the University of Hawaii, who say the process should make it easier to harness the novel optical and physical properties of such nanomaterials. Once nanotubes have been fabricated, they are extremely difficult to arrange and order, say the researchers, who used nitrogen gas to blow bubbles of an epoxy polymer containing silicon nanowires, single-walled carbon nanotubes or multi-walled carbon nanotubes, and caught the resulting film on a surface. When the film was examined under both optical and electron microscopes, the nanowires and nanotubes had become neatly lined up and evenly spread out across the surface. Researchers believe this technique could help tackle a major issue that has hindered efforts to commercialize nanotechnology: creating an effective and scalable method of fabrication. Read more
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International Demand Summit Call for Papers
A call for papers has been sent out for the “Meeting the Growing Demand for Engineers and their Educators 2010-2020” International Conference to be held in Munich, Germany on 9 - 11 November 2007, sponsored by the IEEE and the Association for Electrical, Electronic & Information Technologies (VDE). The conference will bring together decision makers from industry, government and education to discuss and plan the preparation of future engineers and the people who educate them. The specific focus for the conference will be to analyze and address the lack of engineers and technical educators worldwide. Attendance of the conference will be limited to ensure quality interaction between participants. Deadline for proposed paper synopsis is 30 June 2007; the deadline for final paper submissions is 1 October 2007. For more information about submitting a paper or the conference in general, please visit
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Reports Call for Regulation of Nanotechnology
While most people agree that nanotechnology requires government regulation, the current Environmental Protection Agency (EPA) statutes based on mass and weight as the trigger for regulation do not make sense when applied to nanomaterials, according to a report by a former EPA administrator. The report, "EPA and Nanotechnology: Oversight for the 21st Century," was issued by the Woodrow Wilson International Center for Scholars, and was authored by J. Clarence Davies, former EPA assistant administrator for policy, planning and evaluation, who said “Nanotechnology is full of opportunities, but it would be extraordinary and unprecedented if a technology as powerful and as broad as nanotechnology did not have some potential adverse effects.” Davies also said a new testing regime is necessary to measure specific toxic effects of nanoparticles, and that these tests should be based on chemical composition, shapes and human exposure levels. Read more
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Startup Firm Claims Breakthrough in IC Design
Digital integrated circuits designers will soon be able to use full custom designs while retaining the benefits of cell-based design methods. According to the startup firm Nangate, its new re-synthesis solution, Design Optimizer, can create an optimized gate-level design with area, speed, or power benefits, and its process uses patented covering and mapping algorithms developed internally. All RTL synthesis tools currently rely on a predefined standard cell library, according to Nangate, which says its solution provides a new capability to combine synthesis with library creation for a better utilization of the CMOS processes. The new re-synthesis solution also utilizes high pin count and complex gate functions that existing synthesis tools cannot use. Read more
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The Future of EDA and Semiconductors
According to panelists at the Design Automation Conference, held in San Diego, CA, USA at the beginning of June, the EDA industry should enjoy respectable growth during the next ten years, but only if it adapts to new challenges. Fu-Chieh Hsu, vice president for design and technology platforms at TSMC, commented that the “semiconductor industry is now in a golden age of synergy and will reach maturity after 2017.” The panelists, who also included Juan-Antonio Carballo, general partner at Argon Venture Partners; Kurt Keutzer, professor of electrical engineering and computer science at the University of California at Berkeley; Kazu Yamada, vice president of custom SoC solutions for NEC Electronics America; and Aart ge Geus, CEO of Synopsys, predicted that growth over the next ten years will cause the EDA industry to be worth between US $600 million and over $1 trillion in 2017. Challenges facing the future of EDA and semiconductors were also discussed during the panel including the growing importance of programmable platforms, time to market on high-volume applications, power and performance uncertainty, and designs with hundreds of heterogeneous cores. To read more about the EDA panel, visit
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International Summit to Focus on Growing Demand for Engineers
The IEEE and the Association for Electrical, Electronic & Information Technologies (VDE) are sponsoring the “Meeting the Growing Demand for Engineers and their Educators 2010-2020” International Conference to be held in Munich, Germany on 9-11 November 2007. The conference will bring together decision makers from industry, government and education to discuss and plan the preparation of future engineers and the people who educate them. The specific focus for the conference will be to analyze and address the lack of engineers and technical educators worldwide. Main objectives for the summit include establishing and expanding partnerships between the attendees, opening channels of communication, and developing action plans to ensure the proper recruitment and training of future engineers and engineering educators. Attendance of the conference will be limited to ensure quality interaction between participants. Deadline for early registration is 15 August 2007; late registration ends 17 October 2007. For more information about registration or the conference in general, please visit
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