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New Method For Fabricating Nanowire Circuits Demonstrated
In collaboration with German researchers, applied scientists at Harvard University, Cambridge, Massachusetts, USA, have developed a new technique for fabricating nanowire photonic and electronic integrated circuits. While semiconductor nanowires—rods with an approximate diameter of one-thousandth the width of a human hair—can be easily synthesized in large quantities using inexpensive chemical methods, reliable and controlled strategies for assembling them into functional circuits have posed a major challenge. This new method could make assembling circuits suitable for high-volume commercial production. "Because our fabrication technique is independent of the geometrical arrangement of the nanowires on the substrate, we envision further combining the process with one of the several methods already developed for the controlled placement and alignment of nanowires over large areas," said Federico Capasso, Robert L. Wallace Professor of Applied Physics and Vinton Hayes Senior Research Fellow in Electrical Engineering at Harvard. "We believe the marriage of these processes will soon provide the necessary control to enable integrated nanowire photonic circuits in a standard manufacturing setting." Read more
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Developers Wary of Multicore Processors
Embedded systems developers will make a slow transition to multicore processors, lured by high performance but hesitant because of difficulty programming the new chips and a lack of software standards, according to an informal survey of 211 developers taken by software tool company Virtutech and Freescale Semiconductor. Only 51 percent of respondents say they have applications running on multicore CPUs or will migrate to multicore processors in the next three to five years and 49 percent say they neither use multicore chips nor plan to do so in the next five years. Of the respondents planning to use multicore chips, 75 percent say they are doing so to get more performance, despite the fact that only 13 percent ranked performance as the most important factor in choosing a multicore CPU. Software concerns topped the list of reasons for developers to steer clear of multicore, and most respondents said longer software development time was the key challenge. Read more
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Call for Papers: Communications and Information Technologies Symposium
Sponsored by the IEEE Circuits and Systems Society, the 2008 International Symposium on Communications and Information Technologies (ISCIT) is being held 21-23 October in Vientiane, Laos. Prospective authors are invited to submit their papers reporting original work in all areas of information technologies and communications. Topics for papers include signal processing, communications systems, circuits and systems, computer and information, VLSI, information technologies and industrial applications. Papers are due 4 June 2008. For a full list of acceptable paper topics, visit the ISCIT 2008 web site.
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Electronics ‘Missing Link’ Predicted in 1971, Found in 2008
Nanoscale circuits that can remember the amount and duration of the last voltage applied to them have been created by the Hewlett-Packard laboratory in Palo Alto, California, USA. The device, dubbed a “memristor,” was predicted in 1971 by Leon Chua, a circuit designer from the University of California-Berkeley, USA. The device could help develop denser memory chips and possibly electronic circuits that mimic the synapses of the human brain. The circuits are based on titanium dioxide, the active ingredient in sunscreen. In 1971, Chua, using non-linear mathematics, realized something was missing from standard circuit calculations, a link between flux and charge, which led him to theorize what he dubbed the memristor. The way memristors handle current and voltage is startlingly similar to the way synapses between brain cells do, says Chua: both build up voltage to a threshold before firing and letting a current pass. Memristors will make future chips smaller while helping to minimize power-up time. Read more
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IEEE Daniel E. Noble Award Presented to Three ‘RAM’ Researchers
The IEEE Daniel E. Noble Award was given to James Daughton, Stuart Parkin and Saied Tehrani for “fundamental contributions to the development of magneto-resistive devices for non-volatile, high density, random access memory. The researchers’ innovations in memory technologies led to the revolution of the hard disk drive industry and are found in nearly every disk drive on the market today. Most recently, Dr. Parkin, of the IBM Almaden Research Center has been in the news because of new developments with his latest work, Racetrack Memory. Racetrack Memory, so named because the data "races" around a nano-wire "track," could lead to solid-state electronic devices capable of holding far more data in the same amount of space than is possible today. Read more
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Indian Researchers Create Power-Saving DSP Design Technique
Students at the PSG College of Technology, Coimbatore, India, have proposed techniques that could one day enable the design of highly power-efficient digital signal processors. The proposals include a new adder design and a method for implementing the multiplier circuit using decomposition logic. According to a paper by Sundeepkumar Agarwal, V.K. Pavankumar and R. Yokesh, the proposed full adder structure, based on complementary pass transistor logic (CPL), is faster and more energy-efficient than existing adders. "Due to positive feedback and the use of NMOS transistors, the circuit is inherently fast, and this property is utilized to reduce the width of the transistors in order to reduce power consumption without much speed degradation," the researchers claim. Additionally, the proposed adder has a balanced structure that helps in the simultaneous arrival of signals in tree-structured circuits and reduces the generation of unwanted glitches. Read more
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Company Rolls Out Transistor-Level Noise Analysis Software
A noise analysis tool for complex analog and RF circuits has been debuted by Berkeley Design Automation, which says its Noise Analysis Option handles every type of complex circuit, including all analog-to-digital converters, phase-locked loops, DC/DC converters, frequency synthesizers and voltage-controlled oscillators. The Noise Analysis Option uses FastSpice and RF FastSpice technology and is fully compatible with existing flows, produces true Spice accurate results and is already silicon-proven. The company says this is the first transistor-level noise analysis tool, including analysis of the impact of white and flicker noise, with true Spice accuracy for every type of circuit. Until now, it has been either impractical or impossible to perform transistor-level analysis of the impact of device noise for many complex analogue and RF circuits. The Noise Analysis Option allows transient-noise analysis five to 10 times faster and with a much higher capacity than any other tool. Read more
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IEEE Photonics Webinar Considered Huge Success
The free photonic integrated circuits (PICs) webinar, which took place early last month and was taught by IEEE Fellow Christopher R. Doerr, surpassed expectations with over 350 attendees. The webinar, attended by professionals from around the world, provided an overview of the technology behind InP PICs, focusing on devices for fiber-optic communications that monolithically integrate two or more functions. Doerr also highlighted how InP-based PICs can simplify system designs, reduce space and power consumption, improve reliability and reduce the cost of deploying optical networks. An on-demand version of the webinar is also available. Stay tuned for additional IEEE web events. Register for the on-demand webinar
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NIST Gives NanoImprint Lithography Stamp of Approval
Nanoimprint lithography can accurately stamp delicate insulating structures as small as 10 nanometers across with relatively complex shapes on advanced microchips without causing damage, according to researchers at the National Institute of Standards and Technology (NIST), who say the technique is emerging as a good candidate for building complex patterned insulating layers sandwiched between layers of logic devices in future generations of integrated circuits. State-of-the-art semiconductors contain over a billion transistors packed into a footprint of silicon measuring just a few square centimeters. According to researchers, several miles of nanoscale copper wiring are required to connect the devices and these wires must be separated by a highly efficient insulator. Nanoimprint lithography could be used to transfer patterns with details finer than 100 nanometres with minimal distortion due to the processing. The process also has the beneficial effect of increasing the population of small pores, improving performance and creating a thin, dense protective skin across the surface of the material.
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MicroFluidics Technology Enable Nanoparticle Synthesis
A project to explore microfluidics for nanoparticle synthesis in biochemistry is being run jointly by Dolomite and Newcastle University, UK. The partners say microfluidics, so-called lab-on-a-chip technology, will enable very small-scale fluid control and analysis, allowing instrument manufacturers to develop smaller, more cost-effective and more powerful systems. Dolomite says it created a custom glass microchip with multiple reaction chambers for the project, manufactured using lithographic patterning, isotropic etching of glass substrates and the accurate thermal bonding of glass substrates. The researchers have been exploring how to control specific chemical reactions in a localized microchip environment, enabling different nanoparticles to be designed for a specific purpose, including the synthesis of silicon-based fluorescent nanoparticles, polymeric nanosensors and catalytic nanoparticles. Read more
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Circuits and Systems for Communications Conference
The 2008 European Conference on Circuits and Systems for Communications (ECCSC) will be held 10-11 July at the Politehnica University in Bucharest, Romania. Sponsored by the IEEE Circuits and Systems Society, the conference is concerned with the design and application of circuit technology for communications. Topics of interest include analog and digital circuits; networks for WB, UHB and multimedia communications; and nano/micro IC manufacturing. Additionally, technical sessions will also cover low-power/low-energy circuits and systems; power/battery technologies; linear and nonlinear signal processing algorithms and architectures; and wireless, fiber-optics and high-capacity cellular mobile communication systems. Reduced registration rates are available for IEEE members. Learn more
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